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AOCBIOGRAPHICAL SUMMARY OF ADELMO ORTIZ-CONDE
(May 2002)

Personal Data:

Born November 28, 1956. Single. Interest: swimming and chess.

Work Address:

Departamento de Electrónica, Universidad Simón Bolívar, Apdo. 89000, Caracas 1080-A, Venezuela.
Phone: 58-212- 906-4010; Fax: 58-212-906-4025; e-mail: ortizc@ieee.org

Home Address:

Qta. Solariega, calle San Antonio, La Trinidad, Caracas, Venezuela
Phone: 58-212-9451659

Education:

Electronics Engineer (1979) : Universidad Simón Bolívar
M.E., Electrical Engineering (1982) : University of Florida, Gainesville, Florida, U.S.A.
Ph.D., Electrical Engineering (1985) : University of Florida, Gainesville, Florida, U.S.A.

Professional Experience:

1995-present Professor, Electronics Engineering, Universidad Simón Bolívar

1990-1995 Associate Professor,Electronics Engineering, Universidad Simón Bolívar

1987-1990 Aggregate Professor, Professor,Electronics Engineering, Universidad Simón Bolívar

1985-1987 Member of Technical Staff, AT&T Bell Laboratories, Reading, PA. USA.

1979-1980 Instructor, Professor, Electronic sEngineering, Universidad Simón Bolívar

Professional Activities:

Society Memberships and Honors:

Field of Research Interest:

Semiconductor device physics, modeling and parameter extraction.

 

Invited Journal Publications:

  1. F. J. García Sánchez, A. Ortiz-Conde, and J. J. Liou, "On the extraction of the source and drain series resistances of MOSFETs (Invited)" Microelectronics Reliability, vol. 39, pp. 1173-1184, 1999.
  2. A. Ortiz-Conde, F.J. Garcia Sanchez, J.J. Liou, "On the extraction of threshold voltage, effective channel length and series resistance of MOSFETs (Invited)", Journal of Telecommunications and Information Technology, vol. 3-4, pp. 43-58, 2000.
  3. A. Ortiz-Conde, F. J. García Sánchez, J. J. Liou, A. Cerdeira, M. Estrada, and Y. Yue, "A review of recent MOSFET threshold voltage extraction methods (Invited)", Microelectronics Reliability, Vol. 42 (4-5), pp. 583-596, 2002..

 

Invited Conference Publications:

  1. J. J. Liou, A. Ortiz-Conde, and F.J. García Sánchez, "Extraction of the threshold voltage of MOSFETs: an overview (Invited)", 1997 IEEE Hong Kong Electron Dev. Meet.., pp. 31-38, Jun. 1997.
  2. A. Ortiz-Conde, F.J. García Sánchez, and J.J. Liou, "Parameter Extraction in Field Effect Transistors (Invited)", Tercer Taller de Simulación y Caracterización de Semiconductores, CINVESTAV-IPN, México D.F., pp. 54-65, Sept.1999.
  3. Algunas Aplicaciones de Funciones Potenciales (Invited Plenary Keynote Speech), F.J. García Sánchez, A. Ortiz-Conde, G. De Mercato and J.J. Liou, Quinta Conferencia de Ingeniería Eléctrica, Mexico, DF, Sept. 1999.
  4. A. Ortiz-Conde, F. J. García Sánchez, and J. J. Liou, "On the Extraction of Threshold Voltage, Effective Channel Length and Series Resistance of MOSFETs (Invited)", Diagnostics and Yield Symposium, Poland, June 2000.
  5. A. Ortiz-Conde and F.J. García Sánchez, "Multi-gate 3-D SOI MOSFETs as the mainstream technology in high speed CMOS applications (Invited)", Electron Devices for Microwave and Optoelectronic Applications (EDMO'2003) (Orlando, USA), Nov. 2003.
  6. A. Ortiz-Conde, F.J. García Sánchez, and J.J. Liou, Extracting the Model Parameters of Non-Ideal Junctions Based on Explicit Analytical Solutions of I-V Characteristics (invited), Proceedings of the7th International Conference on Solid-State and Integrated-Circuit Technology, Beijing, China, October 18-21, 2004.

Journal Publications:

  1. J.G. Fossum, H.K. Lim, and A. Ortiz-Conde, "Linear-region conductance of thin-film SOI MOSFETs with grain boundaries", IEEE Electron Device Lett., vol. EDL-4, pp. 239-242, July 1983.
  2. J.G. Fossum and A. Ortiz-Conde, "Effects of grain boundaries on the channel conductance of SOI MOSFETs", IEEE Trans. Electron Device, vol. ED-30, pp. 933-940, August 1983.
  3. A. Ortiz-Conde and J.G. Fossum, "Moderate inversion in SOI MOSFETs with grain boundaries", IEEE Electron Device Lett., vol. EDL-4, pp. 344-346, October 1983.
  4. J.G. Fossum, A. Ortiz-Conde, H. Shichijo, and S.K. Banerjee, "Anomalous leakage current in LPCVD polysilicon MOSFETs", IEEE Trans. Electron Device, vol. ED-32, pp. 1878-1884, September 1985.
  5. A. Ortiz-Conde and J.G. Fossum "Subthreshold behavior of thin-film small-grain polysilicon MOSFETs", IEEE Trans. Electron Device, vol. ED-33, pp. 1563-1571, October 1986.
  6. F.J. García Sánchez, A. Ortiz-Conde, and A. Sa-Neto, "CdS/p-Si solar cells made by serigraphy", Appl. Phys. Lett., vol. 52, pp. 1261-1263, April 1988.
  7. ;A. Ortiz-Conde, F.J. García Sánchez, P.E. Schmidt, and A. Sa-Neto, "The foundation of a charge-sheet model for the thin-film MOSFET", Solid-State Electronics, vol. 31, pp. 1497-1500, October 1988.
  8. A. Ortiz-Conde, F.J. García Sánchez, P.E. Schmidt, and A. Sa-Neto, "The non-equilibrium inversion layer charge of the thin-film SOI MOSFET", IEEE Trans. Electron Device, vol. ED-36, pp. 1651-1656, September 1989.
  9. A. Ortiz-Conde, R. Herrera, P.E. Schmidt, F.J. García Sánchez, and J. Andrian, "Long-channel silicon-on-insulator MOSFET theory", Solid-State Electronics, vol. 35, pp. 1291-1298, September 1992.
  10. A. Ortiz-Conde and F.J. García Sánchez, "An approximate analytical expression for the equation of the ideal diode with series and shunt resistance", Electronics Lett., vol. 28, pp. 1964-1965, October 1992.
  11. A. Ortiz-Conde, F.J. García Sánchez, P.E. Schmidt, J. Andrian, and E. Paris, "Transconductances of the long-channel silicon-on-insulator MOSFET", Solid-State Electronics, vol. 36, pp. 631-637, April 1993.
  12. A. Ortiz-Conde, J.J. Liou, F.J. García Sánchez, M. García Núñez, and R.L. Anderson, "Series resistance and effective channel length extraction of n-channel MOSFET at 77 K", Electronics. Lett., vol. 30, pp. 670-672, April 1994.
  13. A. Ortiz-Conde, J.J. Liou, W. Wong, and F.J. García Sánchez, "A simple method to extract the difference of the drain and source series resistances in MOSFETs", Electronics Lett., vol. 30, pp. 1013-1015, June 1994.
  14. J.J. Liou and A. Ortiz-Conde, "The effects of the space-charge-layer thickness modulation on diffusion capacitance", Jap. J. Appl. Phys., vol. 33, pp. 6148-6149, November 1994.
  15. F.J. García Sánchez, A. Ortiz-Conde, M. García Núñez, and R.L. Anderson, "Extracting the series resistance and effective channel length of short-channel MOSFETs at liquid nitrogen temperature", Solid-State Electronics, vol. 37, pp. 1943-1948, December 1994.
  16. A. Ortiz-Conde, F.J. García Sánchez, J.J. Liou, J. Andrian, R.J. Laurence, and P.E. Schmidt, "A generalized model for a two-terminal device and its application to parameters extraction", Solid-State Electronics, vol. 38, pp. 265-266, January 1995.
  17. F.J. García Sánchez, A. Ortiz-Conde, and J.J. Liou, "Calculating double-exponential diode model parameters from previously extracted single-exponential model parameters", Electron. Lett., vol. 31, pp. 71-72, January 1995.
  18. Y. Yue, J. J. Liou and A. Ortiz-Conde, "High-level injection in quasi-neutral region of n/p junction devices: numerical results and empirical model", J. Appl. Phys., vol. 77, pp. 1611-1615, February 1995.
  19. Y. Yue, J. J. Liou and A. Ortiz-Conde, "Relative errors of free-carrier density at different temperatures calculated from approximations for the Fermi-Dirac integral", Jap. J. Appl. Phys., vol. 34, pp. 2286-2287, May 1995.
  20. R. Narayanan, A. Ortiz-Conde, J. J. Liou, F. J. García Sánchez, and A. Parthasarathy, "Two-dimensional numerical analysis for extracting the effective channel length of short-channel MOSFET", Solid-State Electronics, Vol. 38, pp. 1155-1159, June 1995.
  21. J.J. Liou, A. Ortiz-Conde, L.L. Liou and C.I. Huang, "Thermal-avalanche interacting behavior of AlGaAs/GaAs multi-emitter finger heterojunction bipolar transistors", Solid-State Electronics, Vol. 38, pp. 1645-1648, September 1995.
  22. Y. Yue, J.J. Liou, A. Ortiz-Conde, and F. Garcia Sanchez, "Effects of High-Level Free-Carrier Injection on the "Base Transit Time of Bipolar Junction Transistors", Solid-State Electronics, vol. 39, pp. 27-31, January 1996.
  23. A. Ortiz-Conde, J. J. Liou, R. Narayanan and F. J. García Sánchez, "Determination of Physical Mechanism Contributing to the difference between drain and source resistances in short-channel MOSFETs", Solid-State Electronics, vol. 39, pp. 211-215, February 1996.
  24. F.J. García Sánchez, A. Ortiz-Conde, and J.J. Liou, "A parasitic series resistance-independent method for device-model parameter extraction", IEE Proc. Cir. Dev. and Sys., vol. 143, pp. 68-70, February 1996.
  25. A. Ortiz-Conde, F. J. García Sánchez and J. J. Liou, "An improved method for extracting the difference between drain and source resistances in MOSFETs", Solid-State Electronics, vol. 39, pp. 419-421, March 1996.
  26. Z. Latif, J. J. Liou, A. Ortiz-Conde, F. J. García Sánchez, W. Wong, and Y.G. Chen, "Analysis of the validity of methods used for extracting the effective channel of short-channel LDD MOSFETs", Solid-State Electronics, vol. 39, pp. 1093-1094, July 1996.
  27. Y. Yue, J. J. Liou, A. Ortiz-Conde, and F. J. García Sánchez, "A comprenhensive study of high-level free-carriers injection in bipolar junction transistors", Jap. J. Appl. Phys., vol. 35, pp. 3845-3851, July 1996.
  28. Z. Latif, A. Ortiz-Conde, J. J. Liou, and F. J. García Sánchez, "A study of the validity of capacitance-based method for extracting the effective channel length of MOSFETs", IEEE Trans. Electron Device, vol. 44, pp. 340-343, February 1997.
  29. Md. Rofiqul Hassan, J. J. Liou, A. Ortiz-Conde, F.J. García Sánchez, and E. Gouveia Fernandes, "Drain and source resistances of short-channel LDD MOSFETs", Solid-State Electronics, vol. 41, pp. 778-780, May 1997.
  30. Md. Rofiqul Hassan, J. J. Liou, and A. Ortiz-Conde, "Gate-oxide thickness dependence of LDD MOSFET parameters," Solid-State Electronics, vol. 41, pp. 1199-1201, August 1997.
  31. A. Ortiz-Conde, E. Gouveia Fernandes, J. J. Liou, Md. Rofiqul Hassan, F.J. García Sánchez, G. Mercato, and W. Wong, "A new approach to extract the threshold voltage of MOSFETs", IEEE Trans. Electron Device, vol. 44, pp. 1523-1528, September 1997.
  32. A. Ortiz-Conde, J. Rodríguez, F. J. García Sánchez , and J. J. Liou, "An improved definition for modeling the threshold voltage of MOSFETS", Solid-State Electronics, vol. 42, pp 1743-1746, September 1998.
  33. A. Ortiz-Conde, J. J. Liou, F. J. García Sánchez, E. Gouveia Fernandes, O. Montilla Castillo, Md. Rofiqul Hassan and G. De Mercato, "A new method for extracting the effective channel length of MOSFETs", Microelectronics Reliability, vol. 38, pp 1867-1870, December 1998.
  34. A. Ortiz-Conde, Yuanshen Ma, J. Thomson, E. Santos, J. J. Liou, F. J. García Sánchez, M. Lei, J. Finol and P. Layman, "Direct extraction of semiconductor device parameters using lateral optimization method" Solid-St. Electron., vol. 43, pp. 845-848, 1999.
  35. F. J. García Sánchez, A. Ortiz-Conde, J. A. Salcedo, J. J. Liou, and Y. Yue, "A procedure for the extraction of the bulk-charge effect parameter in MOSFET models" Solid-St. Electron., vol. 43, n. 7, pp. 1295-1298, 1999.
  36. F. J. García Sánchez, A. Ortiz-Conde, and J. J. Liou, "On the extraction of the source and drain series resistances of MOSFETs," Microelectronics Reliability, vol. 39, pp. 1173-1184, 1999.
  37. G. Xiao, J. Lee, J. J. Liou, and A. Ortiz-Conde, "Incomplete ionization in a semiconductor and its implication to device modeling," Microelectronics Reliability, vol. 39, pp. 1299-1303, Aug. 1999.
  38. J.C. Ranuárez, F. J. García Sánchez, and A. Ortiz-Conde, "Procedure for determining diode parameters at very low forward voltage," Solid-St. Electron., vol. 43, pp. 2129-2133, 1999
  39. X. Cao, J. McMacken, K. Stiles, P. Layman, J. J. Liou, A. Ortiz-Conde, and S. Moinian, "Comparison of the New VBIC and Conventional Gummel-Poon Bipolar Transistor Models", IEEE Trans. Electron Device, vol. 47, pp. 427-433, Feb. 2000.
  40. J.C. Ranuárez, A. Ortiz-Conde, and F. J. García Sánchez, "A new method to extract diode parameters under the presence of parasitic series and shunt resistance" Microelectronics Reliability, vol. 40, pp. 355-358, Feb. 2000.
  41. F. J. García Sánchez, A. Ortiz-Conde, G. De Mercato, J. A. Salcedo, J. J. Liou and Y. Yue, "New simple procedure to determine the threshold voltage of MOSFETs", Solid-State Electronics , vol. 44, pp. 673-675, Mar. 2000.
  42. F. J. García Sánchez, A. Ortiz-Conde, J. A. Salcedo, J. Muci, M. Estrada, A. Cerdeira, J.J. Liou and Y. Yue, "Validation of the Bulk-Charge Effect Parameter Extraction in MOSFETs", Microelectronics Reliability, vol. 40, pp. 941-945, June 2000.
  43. F.J. García Sánchez,, A. Ortiz-Conde, G. De Mercato, J. J. Liou, "Parameter Extraction and Sinal Processing using Potential Function", Universidad Ciencia y Tecnología, vol. 4, pp. 123–136, Sept. 2000.
  44. A. Ortiz-Conde, F.J. García Sánchez and J. Muci, "Exact analytical solutions of the forward non-ideal diode equation with series and shunt parasitic resistances" Solid-State Electronics, vol. 44, pp. 1861-1864, Oct. 2000.
  45. A. Ortiz-Conde, F.J. García Sánchez,, J. J. Liou, "An Overview on Parameter Extraction In Field Effect Transistors", Acta Científica Venezolana, vol. 51, pp. 176–187, 2000.
  46. A. Ortiz-Conde, F.J. Garcia Sanchez, J.J. Liou, "On the extraction of threshold voltage, effective channel length and series resistance of MOSFETs (Invited)" Journal of Telecommunications and Information Technology, vol. 3-4, pp. 43-58, 2000.
  47. A. Ortiz-Conde, M. Estrada, A. Cerdeira, F.J. García Sáánchez and G. De Mercato, "Modeling real junctions by a series combination of two ideal diodes with parallel resistance and its parameter extraction " Solid-State Electronics, vol. 45, pp. 223-228, Feb. 2001.
  48. M. Estrada, A. Cerdeira, A. Ortiz-Conde, F. García, "Determination of trap cross-section in a-Si:H p-i-n diodes parameters using simulation and parameter extraction" Microelectronics Reliability, vol. 41, pp. 605- 610, Abril 2001.
  49. J. A. Salcedo, A. Ortiz-Conde, F. J. García Sánchez , J. Muci, J. J. Liou, and Y. Yue, "New Approach for Defining the Threshold Voltage of MOSFETs" IEEE Trans. Electron Devices, vol. 48, pp. 809-813, April 2001.
  50. A. Ortiz-Conde, A. Cerdeira, M. Estrada, F. J. García Sánchez, R. Quintero, "A simple procedure to extract the threshold voltage of amorphous thin film MOSFETs in the saturation region" Solid-State Electronics, vol. 45, pp. 663-667, May 2001.
  51. A. Cerdeira, M. Estrada, R. Garcia, A. Ortiz-Conde, F. J. García Sánchez, "New procedure for the extraction of basic a-Si:H TFT model parameters in the linear and saturation regions" Solid-State Electronics, vol. 45, pp. 1077-1080, July 2001.
  52. R. Quintero , A. Cerdeira, A. Ortíz-Conde, "Quasi-Three-Dimensional Spice-Based Simulation of the Transient Behavior, including Plasma Spread, of Thyristors and Over-Voltage Protectors", Microelectronics Reliability, vol. 42 , pp. 67-76, Jan. de 2002.
  53. A. Cerdeira, M. Estrada, R. Quintero, D. Flandre, A. Ortiz-Conde, F.J. García Sánchez, "New method for determination of harmonic distortion in SOI FD transistors" Solid-State Electronics, Vol.46, pp. 103-108, Jan. de 2002
  54. F. J. García Sánchez , A. Ortiz-Conde, A. Cerdeira, M. Estrada, D. Flandre, and J. J. Liou, "A method to extract mobility degradation and total series resistance of fully-depleted SOI MOSFETs " IEEE Trans. Electron Devices, vol. 49, pp. 82-88, Jan. 2002.
  55. J.J. Liou, R. Shireen, A. Ortiz-Conde, F.J. García Sánchez, A. Cerdeira, X. Gao, "Influence of polysilicon-gate depletion on the subthreshold behavior of submicron MOSFETs" Microelectronics Reliability, vol. 42 , pp. 343-347, March 2002.
  56. F.J. Garcia Sánchez, A. Ortiz-Conde, J. Finol, R. Salazar and J. Salcedo, "A Minimal Integral Non-Linearity Criterion to Optimize the Design of a New Tanh/Sinh-Type Bipolar Transconductor", IEEE Transactions on Circuits and Systems-I: Fundamental Theory and Applications, Vol. 49, No. 8, pp. 1062-1070, August 2002.
  57. X.F. Gao, J.J. Liou, A. Ortiz-Conde, J. Bernier, G. Croft, "A physics-based model for the substrate resistance of MOSFETs", Solid-State Electronics, Vol.46, pp. 853-857, June 2002.
  58. A. Ortiz-Conde, F. J. García Sánchez, J. J. Liou, A. Cerdeira, M. Estrada, and Y. Yue, "A review of recent MOSFET threshold voltage extraction methods (Invited)", Microelectronics Reliability, Vol. 42 (4-5), pp. 583-596, 2002..
  59. M. Estrada, A. Cerdeira, A. Ortiz-Conde, F.J. García Sánchez, B. Íñiguez, "Extraction method for polycrystalline TFT above and below threshold model parameters" Solid-State Electronics , vol. 46, pp. 2295-2300, 2002
  60. X. F. Gao, J. J. Liou, J. Bernier, G. Croft, and A. Ortiz-Conde, "Implementation of a comprehensive and robust MOSFET model ing Cadence SPICE for ESD applications", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 21, pp. 1497 -1502, Dec. 2002.
  61. A. Ortiz-Conde, F.J. García Sánchez, A. Caralli D'Ambrosio, "A method to evaluate the location of the maximum value of a function with high level of noise" Solid-State Electronics, vol. 47, pp. 93-97, 2003
  62. A. Ortiz-Conde, F. J. García Sánchez and M. Guzmán, " Exact analytical solution of channel surface potential as an explicit function of gate voltage in undoped-body MOSFETs using the Lambert W function and a threshold voltage definition therefrom", Solid-State Electronics, Vol.47, pp. 2067-2074, Nov. 2003.

 

Conference Publications:

1) J.G. Fossum, A. Ortiz, H.K. Lim, and H.W. Lam, "Effects of grain boundaries on channel conduction in thin-film SOI MOSFETs", in SPIE Proc., vol. 385, SPIE Technical Symposium (Los Angeles, California), January 1983.

2) J.G. Fossum and A. Ortiz-Conde, "Effects of grain boundaries on the current-voltage characteristic of SOI MOSFETs", Material Research Society Symposia Proc. (Albuquerque, New Mexico), vol. 33, pp. 199-206, February 1984.

3) M.A. Banak, J.C. Gammel, M.L. Embree, D.M. Pietruszynski, A. Ortiz-Conde, R.A. Furnanage, R.E. Carey, and B.A. Mangieri, "High voltage custom IC's using BCDMOS technology", IEEE Custom Integrated Circuits Conference Proc. (Portland Oregon), pp. 263-266, May 1987.

4) A. Ortiz-Conde, F.J. García Sánchez, P.E. Schmidt, and A. Sa-Neto, "On the charge-sheet model of the thin-film MOSFET", ISA Proc. of the Twentieth Annual Modeling and Simulation Conference, (Pittsburgh, PA), vol. 20, pp. 1341-1345, May 1989.

5) P.E. Schmidt, G.A. Roig, and A. Ortiz-Conde, "On the modeling of ballistic electron transport in a plasma", ISA Proc. of the Twentieth Annual Modeling and Simulation Conference (Pittsburgh, PA), vol. 20, pp. 1329-1333, May 1989.

6) P.E. Schmidt, A. Ortiz-Conde, J. Andrian, K. Yen, and G. Roig, "On the small-signal equivalent circuit model of the thick metal-insulator-metal barrier", ISA Proc. of the Twenty-First Annual Modeling and Simulation Conference (Pittsburgh, PA), vol. 21, pp. 1699-1703, May 1990.

7) A. Ortiz-Conde, F.J. García Sánchez, P.E. Schmidt, A. Sa-Neto, J. Andrian, and J. Muci, "On the maximun effective mobility enhancement in thin-film SOI MOSFET", ISA Proc. of the Twenty-First Annual Modeling and Simulation Conference (Pittsburgh, PA), vol. 21, pp. 1689-1693, May 1990.

8) J. Muci, A. Ortiz-Conde, P.E. Schmidt, F.J. García Sánchez, J. Andrian, and A. Sa-Neto, "On the current-voltage characteristics of long-channel thin-film SOI MOSFET", Proc. of the First Interamerican Engineering Conference (Miami, Florida), vol. 1, pp. 215-219, December 1990.

9) C. Mazón, J. Muci, A. Sa-Neto, A. Ortiz-Conde, and F.J. García, "Spray pyrolysis of ZnO thin-films for photovoltaic applications: effect of gas flow rate and solute concentration", Proc. of the Twenty-Second Photovoltaic Specialist Conference (Las Vegas, Nevada), vol. 22, pp. 1156-1161, October 1991.

10) A. Ortiz-Conde, P.E. Schmidt, F.J. García Sánchez, R. Herrera, and J. Andrian, "The model of the SOI MOSFET", Proc. of the First International Semiconductor Device Research Symposium (Charlottesville, Virginia), vol. 1, pp. 613-616, December 1991.

11) F.J. García Sánchez, J. Muci, C. Mazón, and A. Ortiz-Conde, "Películas semiconductoras policristalinas para aplicaciones fotovoltaicas: técnicas sencillas fabricación", III Congeso Franco-Venezolano Cerámica and Nuevos Materiales (Mérida, Venezuela), December 1991.

12) A. Ortiz-Conde, F.J. García Sánchez, P.E. Schmidt, R. Herrera, and J. Jean, "On the model of the SOI MOSFET", Panamerican Workshop for Applied and Computational Mathematics, (Caracas, Venezuela), vol. 1, pp. 4.19-4.20, January 1993.

13) M. García Núñez, A. Ortiz-Conde, F.J. García Sánchez, and R.L. Anderson, "On MOSFET parameter extraction at liquid nitrogen temperature", VIII Congresso da Socidade Brasileira Microelectronica, vol. 8, pp. VI.7-12, (Campinas, Brasil), September 1993.

14) A. Ortiz-Conde, F.J. García Sánchez, P.E. Schmidt, and R.J. Laurence, Jr., "Extraction of diode parameters from the integration of the forward current", Proc. of the Second International Semiconductor Device Research Symposium (Charlottesville, Virginia), vol. 2, pp. 531-534, December 1993.

15) F.J. García Sánchez, A. Ortiz-Conde, M. García Núñez, and R.L. Anderson, "Series resistance and effective gate length extraction on short-channel PMOS devices at liquid nitrogen temperature", Proc. IEEE Int. Conf. Microelec. Test Struct. (San Diego, California), vol. 7, pp. 190-194, March 1994.

16) A. Ortiz-Conde, F.J. García Sánchez, J.J. Liou, J. Andrian, R.J. Laurence, and P.E. Schmidt, "A method to extract parameters in a generalized two-terminal device", Proc. of SoutCon (Orlando, Florida), pp. 262-265, March 1994.

17) J.J. Liou, A. Kager, R. Narayanan, and A. Ortiz-Conde, "A numerical and comparative study of Si homojunction and AlGaAs/GaAs heterojunction bipolar transistors operating at high temperatures", Proc. Int. High Temp. Elec. Conf. (Charlotte, North Carolina), vol. 2, pp. P-27-31, June 1994.

18) I. Batarseh, R. Liu, A. Ortiz-Conde, A. Yacoub, and K. Siri, "Steady state analysis and performance characteristics of the LLC-type parallel resonant converter", IEEE Power Elec. Spec. Conf. (Taipei, Taiwan), vol. 25, pp. 597-606, June 1994.

19) J.J. Liou, A. Ortiz-Conde, L.L. Liou, and C.I. Huang, "The thermal-avalanche interacting behavior of AlGaAs/GaAs multi-emitter finger heterojunction bipolar transistors", IEEE Topical Workshop on Heterostructure Microelec. (Tokyo, Japan), August 1994.

20) A. Parthasarathy, J.J. Liou, R. Petr, and A. Ortiz-Conde, "Numerical analysis of DC and transient characteristics of n+-i-n+ optically-activated switches", SPIE Int. Soc. Opt. Eng. (Boston, MA), November 1994.

21) F. Mujica, R. Herrera, A. Ortiz-Conde and M. García, "Filtro con condensadores conmutados para aplicaciones video", Workshop Iberchip (Cartagena Indias, Colombia), vol. 1, pp. 381-389, February 1995.

22) R. Narayanan, A. Ortiz-Conde, J. J. Liou, F. J. García Sánchez, and A. Parthasarathy, "Effective channel length of submicrom MOSFETs: numerical simulation, physical mechanisms, and extraction methods", Int. Conf. Solid St. and Int. Cir. Tech., (Beijing, China), pp. 292-294, October 1995.

23) Y. Yue, J. J. Liou, A. Ortiz-Conde and F. J. García Sánchez, "Modeling high-level free-carriers injection in advanced bipolar junction transistors", Int. Conf. Solid St. and Int. Cir. Tech., (Beijing, China), pp. 769-771, October 1995.

24) R. Narayanan, Z. Latif, A. Ortiz-Conde, J. J. Liou, L. Golovanova, W. Wong and F. J. García Sánchez, "A model for reverse short-channel effects in MOSFETs", Int. Caracas Conf. on Cir. Dev. and Sys., (Caracas, Venezuela), pp. 294-297, December 1995.

25) F. J. García Sánchez, A. Ortiz-Conde, G. Mercato, J. J. Liou, and L. Recht, "Eliminating parasitic resistances in parameter extraction of semiconductor device models", Int. Caracas Conf. on Cir. Dev. and Sys., (Caracas, Venezuela), pp. 298-302, December 1995.

26) R. Narayanan, Z. Latif, A. Ortiz-Conde, J. J. Liou, L. Golovanova, W. Wong and F. J. García Sánchez, "On the reverse short-channel effects of submicrom MOSFETs", Proc. of SoutCon (Orlando, Florida), pp. 345-349, June 1996.

27) A. Ortiz-Conde, J.J. Liou, R. Narayanan and F.J. García Sánchez, "On the physical mechanism contributing to the difference between drain and source resistances in short-channel MOSFETs", Proc. of IEEE HKEDM (Hong Kong), pp. 64-67, June 1996.

28) Z. Latif, A. Ortiz-Conde, J.J. Liou, F.J. García Sánchez and W. Wong, "Failure of effective-channel length extraction methods due to the effect of the relative doping level of source and drain in short-channel LDD MOSFETs", Proc. of IEEE HKEDM (Hong Kong), pp. 91-93, June 1996.

29) J. J. Liou, A. Ortiz-Conde, and F.J. García Sánchez, "Extraction of the threshold voltage of MOSFETs: an overview", (invited) Proc. of IEEE HKEDM (Hong Kong), pp. 31-38, June 1997.

30) Z. Latif, A. Ortiz-Conde, J. J. Liou, and F. J. García Sánchez, "On the extraction of the effective channel length of MOSFETs", Proc. of IEEE MIEL (Yugoslavia), pp. 281-284, September 1997.

31) A. Ortiz-Conde, E. Gouveia Fernandes, J. J. Liou, Md. Rofiqul Hassan, F.J. García Sánchez, G. Mercato, W. Wong and O. Montilla Castillo, "On the extraction of the threshold voltage of MOSFETs", Proc. of IEEE MIEL (Yugoslavia), pp. 285-288, September 1997.

32) A. Ortiz-Conde, J. Rodríguez, F. J. García Sánchez, J. J. Liou, J. Muci, "On the definition of the threshold voltage of MOSFETs", 43rd International Scientific Colloquium (Germany), September 1998.

33) A. Ortiz-Conde, J. J. Liou, F. J. García Sánchez, O. Montilla Castillo, Md. Rofiqul Hassan and G. De Mercato, "Eliminating the effects of series resistance on the extraction of the effective channel length of MOSFETs", International Electron Devices and Material Symposia (Tainan, Taiwan), pp. 70-73, December 1998.

34) X. Cao, J. McMacken, K. Stiles, P. Layman, J. J. Liou and A. Ortiz-Conde, "An efficient and accurate method for the parameter extraction of VBIC95 bipolar transistor model", International Electron Devices and Material Symposia (Tainan, Taiwan), pp. 167-170, December 1998.

35) F. J. García Sánchez, A. Ortiz-Conde, J. A. Salcedo, J. J. Liou and Y. Yue, "Extraction of the bulk-charge effect parameter in submicron MOSFETs based on SPICE simulation, device simulation, and measurements", IEEE Silicon Nanoelectronics Workshop, Kyoto, Japan, pp. 50-51, 12-13 June 1999.

36) A. Ortiz-Conde, F.J. García Sánchez, and J.J. Liou, "Parameter Extraction in Field Effect Transistors", (Invited), Tercer taller de simulación y caracterización de semiconductores, CINVESTAV-IPN, México D.F., pp. 54-65, Sept.1999.

37) F.J. García Sánchez, A. Ortiz-Conde, G. De Mercato, J.A. Salcedo, J.J. Liou, Y. Yue, and J. Finol, "Extracting the threshold voltage from the subthreshold to strong inversion transition region of MOSFETs", Proc. of DCIS’99, (Spain), pp. 119-124, Nov. 1999.

38) F. J. García Sánchez, A. Ortiz-Conde, J. A. Salcedo, J.J. Liou and Y. Yue, "Extraction of the Bulk-Charge Effect Parameter in MOSFETs", Proc. of IEEE MIEL (Yugoslavia),, pp. 133-136, May 2000.

39) A. Ortiz-Conde, Yuansheng Ma, J. Thomson, E. Santos, J. J. Liou, "F. J. García Sánchez, M. Lei, J. Finol and P. Layman "Parameter Extraction Using Lateral and Vertical Optimization", Proc. of IEEE MIEL (Yugoslavia), pp. 165-168, May 2000.

40) A. Ortiz-Conde, F. J. García Sánchez, and J. J. Liou, "On the Extraction of Threshold Voltage, Effective Channel Length and Series Resistance of MOSFETs (Invited)", Diagnostics & Yield Symposium, Polonia, June 2000.

41) A. Cerdeira, M. Estrada, R. García, A. Ortiz-Conde, F.J. García, "New procedure for the extraction of AIMSpice level 15 a-Si:H TFT model parameters", Proc. of XVI SBMICRO (Brazil), pp. 261-264, Sept. 2001.

42) A. Ortiz-Conde, F. J. García Sánchez, A. Cerdeira, M. Estrada, D. Flandre, and J. J. Liou, "A procedure to extract mobility degradation, series resistance and threshold voltage of SOI MOSFETs in the saturation region", Sixth International Conference on Solid-State and Integrated-Circuit Technology, pp. 887-890, October 2001 Shanghai, China.

43) A. Cerdeira, R. Quintero, M. Estrada, D. Flandre, A. Ortiz-Conde, F.J. García Sánchez, "Efficient and Accurate Procedure to Evaluate Distortion in SOI FD MOSFET", Proc. of the International Semiconductor Device Research Symposium (Washington, D.C), pp. 477-480, Dec. 2001.

44) M. Estrada, A. Cerdeira, A. Ortiz-Conde, F. J. García Sanchez, B. Iñiguez, "Unified extraction method for amorphous and polycrystalline TFT above threshold model parameters", Int. Caracas Conf. on Cir. Dev. and Sys., (Aruba), pp. D013-1- D013-6, April 2002.

45) A. Caralli, A. Ortiz-Conde and F.J. García Sánchez, "Percentage Area Difference (PAD) as a measure of distortion and its use in Maximum Enclosed Area (MEA), a new ECG signal compression algorithm", Int. Caracas Conf. on Cir. Dev. and Sys., (Aruba), pp. I035-1- I035-5, April 2002.

46) R. Salazar, J. Finol, F.J. García Sánchez and A. Ortiz-Conde, "Design and fabrication of a tanh/sinh-type bipolar transconductor with maximum linearity", Int. Caracas Conf. on Cir. Dev. and Sys., (Aruba), pp. C032-1- C032-6, April 2002.

47) A. Cerdeira, R. Quintero, M. Estrada, D. Flandre, A. Ortiz-Conde, F.J. García Sánchez, "Generalization of the Integral Function Method to Evaluate Distortion in SOI FD MOSFET", Proc. of IEEE MIEL (Yugoslavia), pp. 443-446, May 2002.

48) A. Ortiz-Conde and F.J. García Sánchez, "The six most popular extraction methods of threshold voltage", III Congreso Venezolano de Ing. Eléctrica (Caracas), pp. 365-369, Diciembre de 2002.

49) A. Ortiz-Conde and F.J. García Sánchez, "Multi-gate 3-D SOI MOSFETs as the mainstream technology in high speed CMOS applications (Invited)", Electron Devices for Microwave and Optoelectronic Applications (EDMO2003) (Orlando, USA), Nov. 2003.

50) A. Ortiz-Conde, F.J. García Sánchez , M. Guzmán, "Undoped-body MOSFET Modeling: Explicit Analytic Solution of Surface Potential and a Definition of Threshold Voltage", Proceedings of the XVIII Conference on Design of Circuits and Integrated Systems (DCIS), Ciudad Real, (Spain), Nov. 2003.

51) A. Ortiz-Conde, F.J. García Sánchez, and J.J. Liou, Extracting the Model Parameters of Non-Ideal Junctions Based on Explicit Analytical Solutions of I-V Characteristics (invited), Proceedings of the7th International Conference on Solid-State and Integrated-Circuit Technology, Beijing, China, October 18-21, 2004.

52) A. Caralli, A. Ortiz-Conde, F.J. García Sánchez, Localization of maximum and minimum values of electrocardiografic signals with high level of noise, Proc. Fifth IEEE Int. Caracas Conf. on Dev. Cir. and Sys., pp. 334 - 337, Punta Cana, Dominican Republic, 3 - 5 November 2004.

53) S. Malobabic, A. Ortiz-Conde, F.J. García Sánchez, Modeling the undoped-body Symmetric dual-gate MOSFET, Proc. Fifth IEEE Int. Caracas Conf. on Dev. Cir. and Sys., pp. 19 - 25, Punta Cana, Dominican Republic, 3 - 5 November 2004.

Books:

1) J. J. Liou, A. Ortiz-Conde, and F. J. García Sánchez, "Analysis and Design of MOSFETs: Modeling, Simulation and Parameter Extraction" , Kluwer Academic Publishers (New York, USA), 1998.


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